Recent content by 72hour

  1. Worklog [2022 Contest Entry] αSNES

    yes! I use the automatic download circuit hidden in the back, reserved debugging interface! At the same time, a set of composite signal separation circuit is added. I just want to use this module alone
  2. Worklog [2022 Contest Entry] αSNES

    I also made a GBS according to your design I haven't done the test yet
  3. Worklog [2022 Contest Entry] αSNES

    the SCL network table connected incorrectly to the GND of esp06?
  4. BitBuilt Welcome Thread!

    Hello, new here。Long time lurker
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