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Worklog
[2022 Contest Entry] αSNES
yes! I use the automatic download circuit hidden in the back, reserved debugging interface! At the same time, a set of composite signal separation circuit is added. I just want to use this module alone
72hour
Post #19
Sep 25, 2022
Forum:
Other
Worklog
[2022 Contest Entry] αSNES
I also made a GBS according to your design I haven't done the test yet
72hour
Post #16
Sep 24, 2022
Forum:
Other
Worklog
[2022 Contest Entry] αSNES
the SCL network table connected incorrectly to the GND of esp06?
72hour
Post #14
Aug 29, 2022
Forum:
Other
BitBuilt Welcome Thread!
Hello, new here。Long time lurker
72hour
Post #1,490
Aug 23, 2022
Forum:
General Discussion
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