Worklog TinyTendo - an absurd NES handheld

Nov 4, 2019
6527P+6538,It's different from yours.
Yes, I believe the clones have a slightly larger die, so I don't believe the 10mm cut will work, but maybe 11 or 12mm?

I have a TA-02 clone PPU, and the die is definitely larger.
I'll get some measurements later today if I can find it.
And I'll share my methods for determining where to cut as well.
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Nov 4, 2019
A genuine PPU has a die that's about 3.65mm square, the clone (TA-02)
I ground down however has a die that's about 5x4.5mm.

While a 10x10mm cut will work on a genuine chip, it is not sufficient for clones.
The bonding wires attach roughly 0.3mm from the tips of the leadframe leads, so I usually try to cut 1.5mm outward from the ends to be safe.
So take whatever measurement you get from one lead end, to the end of the opposing lead and add 3mm.

For the clone chips I estimate that at least 11x11mm should work, but you'll have to double check that holds true for other clones than what I have.

(Not sure if my description is concise enough, if not let me know.)
Aug 8, 2020
Hey guys!

While I've not been able to devote much time to the project lately, I have been chipping away at the smaller stuff.

If you've seen my 8bit power reduction thread, you will probably have figured out I'm looking into undervolting the NES hardware down to 3.3V to significantly increase the battery life of my handheld.
Now while simple in theory/on paper this has brought with it some complexities that need figured out.

Among the main things that need figured out to pull off undervolting the NES hardware are:

1) Whether all features of the chipset still work, and work exactly as they should.

2) Whether or not different cartridge hardware (Such as mapper chips) will behave as well at 3V3 as the NES hardware does.

3) Whether there is any benefit, or disadvantage to undervolting one revision chipset over another.

4) Whether NES peripherals/accessories such as the different controllers, 4 player adapters, or even stuff such as R.O.B work as they should.

I have been hard at work testing these things to the best of my current ability, but there's still a bunch more to do.
While my initial voltage/power draw testing data does prove the concept, it only applies to revision G chips, and may not hold true on the other (albeit less common) revisions.
I have started testing on a rev E chipset, and so far it seems that they aren't able to be undervolted as much as rev G.

In my testing of rev G chips, I pretty consistently got the CPU to crash at 3V, and it would run properly anywhere from 3.1-5V.
Rev E however I have found to crash at 3.4V, and only operate properly at 3.5V and higher.
There is a caveat though, as rev E appears to use less power at the same voltages than rev G does!

This sounds like an obvious choice at face value, use rev E chips, and get further battery economy.
However, the fact that they do not run at a standard 3.3V voltage means that my power management solution would need to be a bit more complex.

In any case, there's still a lot more to learn, and a lot more to figure out before I can implement undervolting in my design with any certainty.

As a little bonus, I wanna show something I whipped up purely out of curiosity as to whether I could: View attachment 20916View attachment 20917
A NES motherboard the size of a Raspberry Pi Zero!

Anyway, catch ya later!
Is this an active crystal oscillator? Can I ask you about this crystal circuit diagram?